Memory devices that retain a logic state during a power-down situation are termed "nonvolatile" memory devices. Various type of nonvolatile memory devices include, but are not limited to, a ROM, a PROM, an EPROM, an EEPROM, and a flash EEPROM. Further, each of the above-mentioned nonvolatile memory circuits has a predetermined method of being programmed and erased. For example, an array of flash EEPROM cells, each comprised of a floating gate transistor, is erased in accordance with a bulk erase procedure. Once the flash EEPROM cells have been bulk erased, selected flash EEPROM cells are programmed using various methods. The various methods of programming flash EEPROM cells generally require high voltages on a gate and a drain terminal of a selected flash EEPROM cell. However, there are various constraints associated with the high voltages required for programming flash EEPROM cells. The various constraints include, but are not limited to: (1) limiting the voltage on selected bit-lines to be below the drain junction breakdown voltage of the flash EEPROM cell to prevent a runaway programming of adjacent flash EEPROM cells; (2) optimizing the voltages on selected terminals of a flash EEPROM cell for optimum programming characteristics; and (3) minimizing the voltages at the selected terminals of the flash EEPROM cells to minimize disturbing the logic state of flash EEPROM cells. Therefore, a need exists to control voltages of flash EEPROM programming circuits for optimum programming operations.